K1B3216BDD-FI700
| Model | K1B3216BDD-FI700 |
| Description | Memory IC, 2MX16, CMOS, PBGA54 |
| PDF file | Total 42 pages (File size: 735K) |
| Chip Manufacturer | SAMSUNG |
K1B3216BDD
ASYNCHRONOUS READ TIMING WAVEFORM
Fig.13 TIMING WAVEFORM OF ASYNCHRONOUS READ CYCLE
( WE=V
IH
, WAIT=High-Z)
t
RC
Address
UtRAM
t
CHSP
CS
t
AA
t
CO
t
OH
t
CHZ
t
BA
UB, LB
t
BHZ
t
OE
OE
Data out
High-Z
t
LZ
t
OLZ
t
BLZ
Data Valid
t
OHZ
(ASYNCHRONOUS READ CYCLE)
1.
t
CHZ
and
t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature and voltage condition,
t
CHZ
(Max.) is less than
t
LZ
(Min.) both for a given device and from device to device
interconnection.
3. In asynchronous read cycle, Clock, ADV and WAIT signals are ignored.
Table 17. ASYNCHRONOUS READ AC CHARACTERISTICS
Symbol
Min
t
RC
t
AA
t
CO
t
BA
t
OE
t
OH
t
CSHP
70
-
-
-
-
3
10
Speed
Max
-
70
70
35
35
-
-
ns
ns
ns
ns
ns
ns
ns
t
OLZ
t
BLZ
t
LZ
t
CHZ
t
BHZ
t
OHZ
Units
Symbol
Min
5
5
10
0
0
0
Speed
Max
-
-
-
12
12
12
ns
ns
ns
ns
ns
ns
Units
- 17 -
Revision 1.0
April 2005
