G1-266P-85-1.8
| Model | G1-266P-85-1.8 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Signal Definitions
(Continued)
2.2.5
Power, Ground, and No Connect Signals
BGA
Pin No.
Refer to
(Total of
71)
Refer to
(Total of
32)
Refer to
(Total of
32)
AC5
SPGA
Pin No.
Refer to
(Total of
50)
Refer to
(Total of
32)
Refer to
(Total of
18)
Q5, X2,
Z2,
AM36
Type
GND
Description
Ground Connection
Signal Name
VSS
VCC2
PWR
1.6V, 1.8V, or 2.0V (nominal) Core Power Connection
VCC3
PWR
3.3V (nominal) I/O Power Connection
NC
No Connection
A line designated as NC must be left disconnected.
2.2.6
Internal Test and Measurement Signals
BGA
Pin No.
AC2
SPGA
Pin No.
AJ3
Type
I
Description
Float
Float forces the GX1 processor to float all outputs in the high-
impedance state and to enter a power-down state.
Signal Name
FLT#
RW_CLK
AE6
AL11
O
Raw Clock
This output is the GX1 processor clock. This debug signal can
be used to verify clock operation.
TEST[3:0]
B22, A23,
B21, C21
J2
(PU)
D28, B32,
D26, A33
P4
(PU)
O
SDRAM Test Outputs
These outputs are used for internal debug only.
TCLK
I
Test Clock
JTAG test clock.
This pin is internally connected to a weak (>20-kohm) pull-up
resistor.
TDI
D2
(PU)
F4
(PU)
I
Test Data Input
JTAG serial test-data input.
This pin is internally connected to a weak (>20-kohm) pull-up
resistor.
TDO
F1
J1
O
Test Data Output
JTAG serial test-data output.
TMS
H1
(PU)
N3
(PU)
I
Test Mode Select
JTAG test-mode select.
This pin is internally connected to a weak (>20-kohm) pull-up
resistor.
Revision 1.0
39
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