G1-266P-85-1.8
| Model | G1-266P-85-1.8 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Processor Programming
(Continued)
Real and Virtual 8086 Modes
Logical Address
15
Segment Selector
INDEX
Logical
Address
x 16
Base
Address
+
p
Linear
Address
Physical
Address
Segment
0
INSTRUCTION OFFSET
p = Paging mechanism for virtual 8086 mode only
Main Memory
Protected Mode
Logical Address
Segment Selector
15
INDEX
3 2 1
TI
0
INSTRUCTION OFFSET
RPL
÷8
Segment Descriptor
Base
Address
+
p
Linear
Address
Physical
Address
Segment
GDT or LDT Descriptor Table
p = Paging mechanism
Main Memory
Figure 3-6. Selector Mechanisms
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Revision 1.0
