G1-266P-85-1.8
| Model | G1-266P-85-1.8 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Processor Programming
(Continued)
Selector Load Instruction
Selector
In Segment
Register
15
INDEX
0
TI RPL
Segment Register
Selected By Decoded
Instruction
Segment
Caching
Cached Segment
and Descriptor
Segment
Descriptor
TI = 0
Global Descriptor
Table
TI = 1
Cached
Selector
Used If
Available
Segment
Base
Address
Segment
Descriptor
Local Descriptor
Table
Figure 3-7. Selector Mechanism Caching
Revision 1.0
69
www.national.com
