I3-4030Y
| Model | I3-4030Y |
| Description | Microprocessor, CMOS |
| PDF file | Total 58 pages (File size: 572K) |
| Chip Manufacturer | INTEL |
HSM111.
Problem:
Implication:
PCIe* Device’s SVID is Not Preserved Across The Package C7 C-State
Bus 0, Device 7, Function 0’s SVID register (Subsystem Vendor Identification, Offset
2CH) is not preserved across package C7 C-State transitions.
This may cause the operating system to think the device has been replaced with a
different device.
For the steppings affected, see the
Summary Table of Changes.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
HSM112.
Problem:
Warm Reset Does Not Stop GT Power Draw
Due to this erratum, if GT is enabled prior to a warm reset, it will remain powered after
the warm reset. The processor will make incorrect power management decisions
because it assumes the GT is not drawing power after a warm reset.
The processor may draw more current than expected from an external VR (Voltage
Regulator). The processor may also put the external VR into a low power state where it
will be unable to supply the sufficient power resulting in unpredictable system behavior.
For the steppings affected, see the
Summary Table of Changes.
Implication:
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
HSM113.
Problem:
Unused PCIe* Lanes May Remain Powered After Package C7
If a PCIe controller is enabled and either has unused lanes or no PCIe device is present,
the link and/or unused lanes should enter a low power state. Due to this erratum, after
exiting Package C7, the unused link and/or unused lanes may remain powered.
Power consumption may be greater than expected.
For the steppings affected, see the
Summary Table of Changes.
Implication:
Status:
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
HSM114.
Problem:
BMI1 And BMI2 Instruction Groups Are Not Available
Feature flags BMI1 and BMI2 (CPUID leaf 7, sub-leaf 0, EBX bits 3 and 8) report these
two groups of bit manipulation instructions are not present for the Intel
®
Core™ i3-
4100M these instruction groups should be available. An attempt to execute any of
these instructions will generate a #UD fault.
Software attempting to use any of instructions in the BMI1 and BMI2 groups will result
in a #UD fault
For the steppings affected, see the
Summary Table of Changes.
Implication:
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
HSM115.
Problem:
HD Audio Device Playback May Be Interrupted if The Processor Enters
a Deep Package C-State
When the Integrated Graphics Device (Bus 0; Device 2; Function 0) is in the D3 state,
the processor may enter package C8 or deeper C-state, shutting down the Display
Engine in the process. However, Display Engine operation may be required by the HD
Audio device (Bus 0; Device 3; Function 0).
When this erratum occurs the audio controller may reset causing audio playback to
stop and be unable to resume.
For the steppings affected, see the
Summary Table of Changes.
Implication:
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
Specification Update
47
