K1B6416B6C
| Model | K1B6416B6C |
| Description | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| PDF file | Total 46 pages (File size: 769K) |
| Chip Manufacturer | SAMSUNG |
K1B6416B6C
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level: 0.2 to V
CC
-0.2V
Input rising and falling time: 3ns
Input and output reference voltage: 0.5 x V
CC
Output load: C
L
=30pF
Figure 14. AC Output Load Circuit
UtRAM
Vtt=0.5 x VCC
50Ω
Dout
Z0=50Ω
30pF
Table 18. ASYNCHRONOUS AC CHARACTERISTICS
(V
CC
=1.7~2.0V, T
A
=-40 to 85
°
C)
Parameter List
Common
CS High Pulse Width
Read Cycle Time
Page Read Cycle Time
Address Access Time
Page Access Time
Chip Select to Output
Output Enable to Valid Output
Async.
(Page)
Read
UB, LB Access Time
Chip Select to Low-Z Output
UB, LB Enable to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
UB, LB Disable to High-Z Output
Output Disable to High-Z Output
Output Hold
Write Cycle Time
Chip Select to End of Write
ADV Minimum Low Pulse Width
Address Set-up Time to Beginning of Write
Address Set-up Time to ADV Falling
Address Hold Time from ADV Rising
Async.
Write
CS Setup Time to ADV Rising
Address Valid to End of Write
UB, LB Valid to End of Write
Write Pulse Width
WE High Pulse Width
Write Recovery Time
WE Low to Read Latency
Data to Write Time Overlap
Data Hold from Write Time
1. t
WP
(min)=70ns for continuous write operation over 50 times.
Symbol
Min
t
CSHP(A)
t
RC
t
PC
t
AA
t
PA
t
CO
t
OE
t
BA
t
LZ
t
BLZ
t
OLZ
t
CHZ
t
BHZ
t
OHZ
t
OH
t
WC
t
CW
t
ADV
t
AS
t
AS(A)
t
AH(A)
t
CSS(A)
t
AW
t
BW
t
WP
t
WHP
t
WR
t
WLRL
t
DW
t
DH
10
70
25
-
-
-
-
-
10
5
5
0
0
0
3
70
60
7
0
0
7
10
60
60
55
1)
5 ns
0
1
30
0
Speed
Max
-
-
-
70
20
70
35
35
-
-
-
12
12
12
-
-
-
-
-
-
-
-
-
-
-
Latency-1 clock
-
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
ns
clock
ns
ns
- 20 -
Revision 1.0
January 2005
