K1B6416B6C
| Model | K1B6416B6C |
| Description | 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory |
| PDF file | Total 46 pages (File size: 769K) |
| Chip Manufacturer | SAMSUNG |
K1B6416B6C
SYNCHRONOUS BURST READ SUSPEND TIMING WAVEFORM
UtRAM
Fig.33 TIMING WAVEFORM OF BURST READ SUSPEND CYCLE(1)
[Latency=5,Burst Length=4,WP=Low enable](WE=V
IH
, MRS=V
IH
)
0
T
CLK
t
ADVH
t
ADVS
ADV
t
AS(B)
Address
Valid
1
2
3
4
5
6
7
8
9
10
11
∼
t
AH(B)
Don’t Care
t
CSS(B)
CS
t
BEL
LB, UB
t
BLZ
t
OEL
OE
t
OLZ
Latency 5
Data out
t
WL
WAIT
High-Z
t
WH
t
BC
t
CD
Undefined
t
OHZ
DQ0
DQ1
t
OLZ
High-Z
DQ1
t
OH
t
HZ
DQ2
DQ3
t
WZ
(SYNCHRONOUS BURST READ SUSPEND CYCLE)
1. If clock input is halted during burst read operation, the data out will be suspended. During the burst read suspend period, OE high
drives data out to high-Z. If clock input is resumed, the suspended data will be out first.
2. /WAIT Low(tWL or tAWL) : Data not available(driven by CS low going edge or ADV low going edge)
/WAIT High(tWH) : Data available(driven by Latency-1 clock)
/WAIT High-Z(tWZ) : Data don’t care(driven by CS high going edge)
3. During suspend period, OE high drives DQ to High-Z and OE low drives DQ to Low-Z.
If OE stays low during suspend period, the previous data will be sustained.
4. Burst Cycle Time(tBC) should not be over 2.5µs.
Table 37. BURST READ SUSPEND AC CHARACTERISTICS
Symbol
Min
t
BEL
t
OEL
t
BLZ
t
OLZ
t
CD
t
OH
1
1
5
5
-
3
Speed
Max
-
-
-
-
10
-
clock
clock
ns
ns
ns
ns
t
HZ
t
OHZ
t
WL
t
WH
t
WZ
Units
Symbol
Min
-
-
-
-
-
Speed
Max
12
12
10
12
12
ns
ns
ns
ns
ns
Units
- 39 -
Revision 1.0
January 2005
