G1-233P-85-1.8
Model | G1-233P-85-1.8 |
Description | Processor Series Low Power Integrated x86 Solution |
PDF file | Total 247 pages (File size: 4M) |
Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Electrical Specifications
(Continued)
Table 6-14. Clock Signals (Refer to Figures 6-5 and 6-6) (Continued)
SYSCLK = 33 MHz
Symbol
t13
Parameter
SDCLK_OUT, SDCLK[3:0] Rise Time
200 MHz / 3
233 MHz / 3
233 MHz / 3.5
266 MHz / 3.5
266 MHz / 4
300 MHz / 4
1.
2.
3.
0.45
0.45
0.45
0.45
0.45
0.45
ns
Min
Typ
Max
Units
A SYSCLK of 30 MHz corresponds to a core frequency of 180 MHz. A SYSCLK of 33 MHz corresponds to core frequen-
cies of 166, 200, 233, and 266 MHz.
SDCLK_OUT and SYSCLK rise and fall times are measured between V
IH
min and V
IL
max with a 50 pF load.
SDCLK calculations are based on the following configurations:
200 MHz (6x) / 3 = 66.7 MHz SDCLK_OUT
233 MHz (7x) / 3 = 77.7 MHz SDCLK_OUT
266 MHz (8x) / 3.5 = 76 MHz SDCLK_OUT
300 MHz (9x) / 4 = 75 MHz SDCLK_OUT
Revision 1.0
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