G1-233P-85-1.8
| Model | G1-233P-85-1.8 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Instruction Set
(Continued)
Table 8-27. Processor Core Instruction Set Summary (Continued)
Flags
Instruction
CMOVS
Move if Sign
Register, Register/Memory
CMOVNS
Move if Not Sign
Register, Register/Memory
CMP
Compare Integers
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator
CMPS
Compare String
CMPXCHG
Compare and Exchange
Register1, Register2
Memory, Register
CMPXCHG8B
Compare and Exchange 8 Bytes
CPUID
CPU Identification
CPU_READ
Read Special CPU Register
CPU_WRITE
Write Special CPU Register
CWD
Convert Word to Doubleword
CWDE
Convert Word to Doubleword Extended
DAA
Decimal Adjust AL after Add
DAS
Decimal Adjust AL after Subtract
DEC
Decrement by 1
Register/Memory
Register (short form)
DIV
Unsigned Divide
Accumulator by Register/Memory
Divisor: Byte
Word
Doubleword
ENTER
Enter New Stack Frame
Level = 0
Level = 1
Level (L) > 1
HLT
Halt
IDIV
Integer (Signed) Divide
Accumulator by Register/Memory
Divisor: Byte
Word
Doubleword
IMUL
Integer (Signed) Multiply
Accumulator by Register/Memory
Multiplier:
Byte
Word
Doubleword
Register with Register/Memory
Multiplier:
Word
Doubleword
Register/Memory with Immediate to Register2
Multiplier:
Word
Doubleword
IN
Input from I/O Port
Fixed Port
Variable Port
INS
Input String from I/O Port
E [010w] #
E [110w]
6 [110w]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8
8
11
8/22
8/22
11/25
b
h,m
m
F [011w] [mod 101 r/m]
x
-
-
-
x
x
u u x
4
5
15
0F AF [mod reg r/m]
5
15
6 [10s1] [mod reg r/m] ###
6
16
6
16
5
15
4
5
15
b
h
F [011w] [mod 111 r/m]
-
-
-
-
x
x
u u -
20
29
45
20
29
45
b,e
e,h
F4
-
-
-
-
-
-
-
-
-
C8 ##,#
-
-
-
-
-
-
-
-
-
13
17
17+2*L
10
13
17
17+2*L
10
l
b
h
F [011w] [mod 110 r/m]
-
-
-
-
x
x
u u -
20
29
45
20
29
45
b,e
e,h
F [111w] [mod 001 r/m]
4 [1 reg]
x
-
-
-
x
x
x
x
-
1
1
1
1
b
h
0F B [000w] [11 reg2 reg1]
0F B [000w] [mod reg r/m]
0F C7 [mod 001 r/m]
0F A2
0F 3C
0F 3D
99
98
27
2F
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
x
x
-
-
x
x
-
-
x
x
-
-
x
x
-
-
x
x
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
12
1
1
2
3
2
2
12
1
1
2
3
2
2
x
-
-
-
x
x
x
x
x
6
6
6
6
3 [10dw] [11 reg r/m]
3 [101w] [mod reg r/m]
3 [100w] [mod reg r/m]
8 [00sw] [mod 111 r/m] ###
3 [110w] ###
A [011w]
x
-
-
-
x
x
x
x
x
x
-
-
-
x
x
x
x
x
1
1
1
1
1
6
1
1
1
1
1
6
b
h
b
h
0F 49 [mod reg r/m]
-
-
-
-
-
-
-
-
-
1
1
r
0F 48 [mod reg r/m]
-
-
-
-
-
-
-
-
-
1
1
r
Opcode
O D I T S Z A P C
F F F F F F F F F
Real
Mode
Prot’d
Mode
Real
Mode
Prot’d
Mode
Clock Count
(Reg/Cache Hit)
Issues
Revision 1.0
225
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