G1-233P-85-1.8
| Model | G1-233P-85-1.8 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Instruction Set
(Continued)
Table 8-27. Processor Core Instruction Set Summary (Continued)
Flags
Instruction
LEA
Load Effective Address
No Index Register
With Index Register
LES
Load Pointer to ES
LFS
Load Pointer to FS
LGDT
Load GDT Register
LGS
Load Pointer to GS
LIDT
Load IDT Register
LLDT
Load LDT Register
From Register/Memory
LMSW
Load Machine Status Word
From Register/Memory
LODS
Load String
LSL
Load Segment Limit
From Register/Memory
LSS
Load Pointer to SS
LTR
Load Task Register
From Register/Memory
LEAVE
Leave Current Stack Frame
LOOP
Offset Loop/No Loop
LOOPNZ/LOOPNE
Offset
LOOPZ/LOOPE
Offset
MOV
Move Data
Register to Register
Register to Memory
Register/Memory to Register
Immediate to Register/Memory
Immediate to Register (short form)
Memory to Accumulator (short form)
Accumulator to Memory (short form)
Register/Memory to Segment Register
Segment Register to Register/Memory
MOV
Move to/from Control/Debug/Test Regs
Register to CR0/CR2/CR3/CR4
CR0/CR2/CR3/CR4 to Register
Register to DR0-DR3
DR0-DR3 to Register
Register to DR6-DR7
DR6-DR7 to Register
Register to TR3-5
TR3-5 to Register
Register to TR6-TR7
TR6-TR7 to Register
MOVS
Move String
MOVSX
Move with Sign Extension
Register from Register/Memory
MOVZX
Move with Zero Extension
Register from Register/Memory
MUL
Unsigned Multiply
Accumulator with Register/Memory
Multiplier:
Byte
Word
Doubleword
NEG
Negate Integer
F [011w] [mod 100 r/m]
x
-
-
-
x
x
u u x
4
5
15
F [011w] [mod 011 r/m]
x
-
-
-
x
x
x
x
x
1
4
5
15
1
b
h
b
h
0F B[011w] [mod reg r/m]
-
-
-
-
-
-
-
-
-
1
1
b
h
0F B[111w] [mod reg r/m]
-
-
-
-
-
-
-
-
-
1
1
b
h
0F 22 [11 eee reg]
0F 20 [11 eee reg]
0F 23 [11 eee reg]
0F 21 [11 eee reg]
0F 23 [11 eee reg]
0F 21 [11 eee reg]
0F 26 [11 eee reg]
0F 24 [11 eee reg]
0F 26 [11 eee reg]
0F 24 [11 eee reg]
A [010w]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
20/5/5
6
10
9
10
9
16
8
11
3
6
18/5/6
6
10
9
10
9
16
8
11
3
6
b
h
l
8 [10dw] [11 reg r/m]
8 [100w] [mod reg r/m]
8 [101w] [mod reg r/m]
C [011w] [mod 000 r/m] ###
B [w reg] ###
A [000w] +++
A [001w] +++
8E [mod sreg3 r/m]
8C [mod sreg3 r/m]
-
-
-
-
-
-
-
-
-
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
1
b
h,i,j
0F 00 [mod 011 r/m]
C9
E2 +
E0 +
E1 +
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4
2
2
2
9
4
2
2
2
a
b
g,h,j,l
h
r
r
r
0F 03 [mod reg r/m]
0F B2 [mod reg r/m]
-
-
-
-
-
-
-
-
-
-
x
-
-
-
-
-
-
-
4
9
10
a
a
g,h,j,p
h,i,j
0F 01 [mod 110 r/m]
A [110 w]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
11
3
11
3
b,c
b
h,l
h
0F 00 [mod 010 r/m]
-
-
-
-
-
-
-
-
-
8
a
g,h,j,l
C4 [mod reg r/m]
0F B4 [mod reg r/m]
0F 01 [mod 010 r/m]
0F B5 [mod reg r/m]
0F 01 [mod 011 r/m]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
8D [mod reg r/m]
-
-
-
-
-
-
-
-
-
1
1
4
4
10
4
10
1
1
9
9
10
9
10
b
b
b,c
b
b,c
h,i,j
h,i,j
h,l
h,i,j
h,l
Opcode
O D I T S Z A P C
F F F F F F F F F
Real
Mode
Prot’d
Mode
Real
Mode
Prot’d
Mode
Clock Count
(Reg/Cache Hit)
Issues
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