G1-300B-85-2.0
| Model | G1-300B-85-2.0 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Instruction Set
(Continued)
8.1.1 Prefix (Optional)
Prefix bytes can be placed in front of any instruction to
modify the operation of that instruction. When more than
one prefix is used, the order is not important. There are
five types of prefixes that can be used:
1.
Segment Override explicitly specifies which segment
register the instruction will use for effective address
calculation.
Address Size switches between 16-bit and 32-bit
addressing by selecting the non-default address size.
Operand Size switches between 16-bit and 32-bit
operand size by selecting the non-default operand
size.
Repeat is used with a string instruction to cause the
instruction to be repeated for each element of the
string.
Lock is used to assert the hardware LOCK# signal
during execution of the instruction.
w
Field
0
1
8.1.2 Opcode
The opcode field specifies the operation to be performed
by the instruction. The opcode field is either one or two
bytes in length and may be further defined by additional
bits in the mod r/m byte. Some operations have more than
one opcode, each specifying a different form of the opera-
tion. Certain opcodes name instruction groups. For exam-
ple, opcode 80h names a group of operations that have an
immediate operand and a register or memory operand. The
reg field may appear in the second opcode byte or in the
mod r/m byte.
The opcode may contain w, d, s and eee opcode fields, for
example, as shown in Table 8-27 on page 223.
8.1.2.1 w Field (Operand Size)
When used, the 1-bit w field selects the operand size dur-
ing 16-bit and 32-bit data operations. See Table 8-4.
2.
3.
4.
5.
Table 8-4. w Field Encoding
Operand Size
16-Bit Data
Operations
8 bits
16 bits
32-Bit Data
Operations
8 bits
32 bits
bytes.
Table 8-3. Instruction Prefix Summary
Prefix
ES:
CS:
SS:
DS:
FS:
GS:
Operand
Size
Address
Size
LOCK
REPNE
REP/REPE
Encoding
26h
2Eh
36h
3Eh
64h
65h
66h
67h
F0h
F2h
F3h
Description
Override segment default, use ES
for memory operand.
Override segment default, use CS
for memory operand.
Override segment default, use SS
for memory operand.
Override segment default, use DS
for memory operand.
Override segment default, use FS
for memory operand.
Override segment default, use GS
for memory operand.
Make operand size attribute the
inverse of the default.
Make address size attribute the
inverse of the default.
Assert LOCK# hardware signal.
Repeat the following string
instruction.
Repeat the following string
instruction.
1
8.1.2.2 d Field (Operand Direction)
When used, the 1-bit d field determines which operand is
taken as the source operand and which operand is taken
as the destination. See Table 8-5.
Table 8-5. d Field Encoding
d
Field
0
Direction of
Operation
Register-to-Register
or
Register-to-Memory
Register-to-Register
or
Memory-to-Register
Source
Operand
reg
Destination
Operand
mod r/m
or
mod ss-index-
base
reg
mod r/m
or
mod ss-
index-base
www.national.com
214
Revision 1.0
