K1C6416B8D-FI70T
| Model | K1C6416B8D-FI70T |
| Description | Memory IC, 4MX16, CMOS, PBGA54 |
| PDF file | Total 47 pages (File size: 1M) |
| Chip Manufacturer | SAMSUNG |
K1C6416B8D
READ Burst Suspend
(CRE=V
IL
)
t
CLK
V
IH
CLK
V
IL
ADV
V
IH
V
IL
t
SP
V
IH
A[21:16]
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
t
CSW
WAIT
V
OH
V
OL
t
SP
A/DQ[15:0]
V
IH
V
IL
t
HD
Valid
Output
Valid
Output
Valid
Output
Valid
Output
NOTE 2
UtRAM2
t
SP
t
HD
t
ADVO
t
AHCR
t
HD
Valid
Address
Valid
Address
t
CSP
t
CSM
t
HZ
CS
t
OHZ
t
SP
t
HD
NOTE 3
t
OHZ
OE
WE
LB/UB
t
BOE
t
OLZ
t
CSW
High-Z
t
KOH
t
OLZ
High-Z
Valid
Address
t
BOE
Valid
Output
Valid
Output
Valid
Address
t
ACLK
Don’t Care
Undefined
1. Non-default BCR settings for READ burst suspend: Fixed or variable latency; latency code two (three clocks); WAIT active LOW; WAIT asserted
during delay.
2. CLK can be stopped LOW or HIGH, but must be static, with no LOW-to-HIGH transitions during burst suspend.
3. OE can stay LOW during burst suspend. If OE is LOW, A/DQ[15:0] will continue to output valid data.
4. Don’t care must be in V
IL
or V
IH
.
- 30 -
Revision 3.0
Sep 2007
