K1C6416B2D-BI70
| Model | K1C6416B2D-BI70 |
| Description | Memory IC, 4MX16, CMOS, PBGA54 |
| PDF file | Total 50 pages (File size: 1M) |
| Chip Manufacturer | SAMSUNG |
K1C6416B2D
4-Word Burst READ Operation— Row Boundary Crossing
(CRE=V
IL
)
t
CLK
CLK
V
IH
V
IL
t
SP
A[21:0]
V
IH
V
IL
t
HD
t
KHKL
UtRAM2
Valid Address
t
SP
ADV
V
IH
V
IL
t
AA
t
HD
t
AVH
t
AHCR
t
AADV
V
IH
LB/UB
V
IL
t
SP
t
HD
t
CSP
CS
V
IH
V
IL
V
IH
V
IL
t
SP
WE
V
IH
V
IL
V
OH
V
OL
t
ACLK
DQ[15:0]
V
IH
IN/OUT
V
IL
High-Z
t
HD
t
CSM
t
CO
t
BOE
t
OLZ
t
HD
t
KHTL
t
CBPH
t
HZ
OE
t
OHZ
t
CSW
High-Z
WAIT
t
KOH
Valid
Output
Valid
Output
Valid
Output
Valid
Output
READ Burst Identified
(WE = HIGH)
End of Row
Don’t Care
Undefined
1. Non-default BCR settings: Fixed latency; latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
2. Don’t care must be in V
IL
or V
IH
.
- 27 -
Revision 3.0
Sep 2007
