G1-300P-85-2.0
| Model | G1-300P-85-2.0 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Integrated Functions
(Continued)
4.5
DISPLAY CONTROLLER
extension colors), display timing generator, dither and
frame-rate-modulation circuitry for TFT panels, and versa-
tile output formatting logic. A diagram of the display control-
ler subsystem is shown in Figure 4-14.
The GX1 processor incorporates a display controller that
retrieves display data from the memory controller and for-
mats it for output on a variety of display devices. The GX1
processor connects directly to the graphics Geode I/O
companion. The display controller includes a display FIFO,
compression/decompression (codec) hardware, hardware
cursor, a 256-entry-by-18-bit palette RAM (plus three
Compressed
Line Buffer
(64x32 bit)
Memory
Data
32
32
18
16
8
Video
Dither
and
FRM
Pseudo/True
Color Mux
Output
Format
18
Display
FIFO
(64x64 bit)
64
8
Codec
Cursor
Latch
2
Extensions
Palette
Addr.
Logic
9
Graphics
Palette
RAM
(264x18
bit)
18
9
Memory
Address
20
Memory
Address
Generator
Control Registers
and
Control Logic
Timing
Generator
Output
Control
Figure 4-14. Display Controller Block Diagram
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