G1-300P-85-2.0
| Model | G1-300P-85-2.0 |
| Description | Processor Series Low Power Integrated x86 Solution |
| PDF file | Total 247 pages (File size: 4M) |
| Chip Manufacturer | NSC |
Geode™ GX1 Processor Series
Integrated Functions
(Continued)
Table 4-28. Display Controller Register Summary (Continued)
GX_BASE+
Memory
Offset
Default
Value
Type
Name/Function
Palette and RAM Diagnostic Registers
8370h-8373h
R/W
DC_PAL_ADDRESS
Display Controller Palette Address: This register should be written with the address (index)
location to be used for the next access to the DC_PAL_DATA register.
8374h-8377h
R/W
DC_PAL_DATA
Display Controller Palette Data: Contains the data for a palette access cycle.
8378h-837Bh
R/W
DC_DFIFO_DIAG
Display Controller Display FIFO Diagnostic: This register is provided to enable testability of
the Display FIFO RAM.
837Ch-837Fh
R/W
DC_CFIFO_DIAG
Display Controller Compression FIFO Diagnostic: This register is provided to enable test-
ability of the Compressed Line Buffer (FIFO) RAM.
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Revision 1.0
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