U1AFS600-1PQG208
| Model | U1AFS600-1PQG208 |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
3.3 V PCI, 3.3 V PCI-X
The Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI
Bus applications.
Table 2-134 •
Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
Drive Strength
Per PCI
specification
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
VIL
Min.
V
Max.
V
Min.
V
VIH
Max.
V
VOL
Max.
V
VOH
Min.
V
IOL
mA
IOH
mA
IOSL
Max.
mA
3
IOSH
Max.
mA
3
IIL
1
µA
4
10
IIH
2
µA
4
10
Per PCI curves
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Microsemi loadings for enable
path characterization are described in
R = 25
Test Point
Data Path
R to VCCI for t
DP
(F)
R to GND for t
DP
(R)
R=1k
Test Point
Enable Path
R to VCCI for t
LZ
/ t
ZL
/ t
ZLS
R to GND for t
HZ
/ t
ZH
/ t
ZHS
10 pF for t
ZH
/ t
ZHS
/ t
ZL
/ t
ZLS
10 pF for t
HZ
/ t
LZ
Figure 2-121 •
AC Loading
AC loadings are defined per PCI/PCI-X specifications for the data path; Microsemi loading for tristate is
described in
Table 2-135 •
AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
0
Input High (V)
3.3
Measuring Point* (V)
0.285 * VCCI for t
DP(R)
0.615 * VCCI for t
DP(F)
VREF (typ.) (V)
–
C
LOAD
(pF)
10
Note:
*Measuring point = Vtrip. See
for a complete table of trip points.
Revision 2
2- 199
