U1AFS600-1PQG208
Model | U1AFS600-1PQG208 |
Description | Field Programmable Gate Array, |
PDF file | Total 334 pages (File size: 18M) |
Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
FIFO Characteristics
Timing Waveforms
RCLK/
WCLK
t
MPWRSTB
RESET
t
RSTFG
EF
t
RSTAF
AEF
t
RSTFG
FF
t
RSTAF
AFF
WA/RA
(Address Counter)
Figure 2-57 •
FIFO Reset
t
RSTCK
MATCH (A
0
)
t
CYC
RCLK
t
RCKEF
EF
t
CKAF
AEF
WA/RA
(Address Counter)
NO MATCH
NO MATCH
Dist = AEF_TH
MATCH (EMPTY)
Figure 2-58 •
FIFO EMPTY Flag and AEMPTY Flag Assertion
Revision 2
2- 75