U1AFS600-1PQG208
Model | U1AFS600-1PQG208 |
Description | Field Programmable Gate Array, |
PDF file | Total 334 pages (File size: 18M) |
Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
VAREF
ADCGNDREF
AV0
AC0
AT0
AV9
AC9
AT9
ATRETURN01
ATRETURN9
DENAV0
DENAC0
DENAT0
DENAV0
DENAC0
DENAT0
CMSTB0
CSMTB9
GDON0
GDON9
TMSTB0
TMSTB9
MODE[3:0]
TVC[7:0]
STC[7:0]
CHNUMBER[4:0]
TMSTINT
ADCSTART
VAREFSEL
PWRDWN
ADCRESET
RTCCLK
SYSCLK
ACMWEN
ACMRESET
ACMWDATA
ACMADDR
ACMCLK
AB
DAVOUT0
DACOUT0
DATOUT0
DAVOUT9
DACOUT9
DATOUT9
AG0
AG1
AG9
BUSY
CALIBRATE
DATAVALID
SAMPLE
RESULT[11:0]
RTCMATCH
RTCXTLMODE
RTCXTLSEL
RTCPSMMATCH
ACMRDATA[7:0]
Figure 2-62 •
Analog Block Macro
Revision 2
2- 79