• Inventory
  • Products
  • Technical Information
  • Circuit Diagram
  • Data Sheet
Data Sheet
Home > Data Sheet > U1AFS600-1PQG208
U1AFS600-1PQG208

U1AFS600-1PQG208

Model U1AFS600-1PQG208
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
The 1.76 W power is less than the required 3.00 W. The design therefore requires a heat sink, or the
airflow where the device is mounted should be increased. The design's total junction-to-air thermal
resistance requirement can be estimated by
T
J
T
A
100°C
70°C
-
-
θ
ja(total)
= ------------------ = ----------------------------------- =
10.00°C/W
P
3.00 W
EQ 7
Determining the heat sink's thermal performance proceeds as follows:
θ
JA(TOTAL)
=
θ
JC
+
θ
CS
+
θ
SA
EQ 8
where
θ
JA
=
=
0.37°C/W
Thermal resistance of the interface material between
the case and the heat sink, usually provided by the
thermal interface manufacturer
Thermal resistance of the heat sink in °C/W
θ
SA
=
θ
JA(TOTAL)
θ
JC
θ
CS
EQ 9
θ
SA
=
13.33°C/W
8.28°C/W
0.37°C/W
=
5.01°C/W
A heat sink with a thermal resistance of 5.01°C/W or better should be used. Thermal resistance of heat
sinks is a function of airflow. The heat sink performance can be significantly improved with increased
airflow.
Carefully estimating thermal resistance is important in the long-term reliability of an Microsemi FPGA.
Design engineers should always correlate the power consumption of the device with the maximum
allowable power dissipation of the package selected for that device.
Note: The junction-to-air and junction-to-board thermal resistances are based on JEDEC standard
(JESD-51) and assumptions made in building the model. It may not be realized in actual application and
therefore should be used with a degree of caution. Junction-to-case thermal resistance assumes that all
power is dissipated through the case.
θ
SA
=
Temperature and Voltage Derating Factors
Table 3-7 •
Temperature and Voltage Derating Factors for Timing Delays
(normalized to T
J
= 70°C, Worst-Case VCC = 1.425 V)
Array Voltage
VCC (V)
1.425
1.500
1.575
Junction Temperature (°C)
–40°C
0.88
0.83
0.80
0°C
0.93
0.88
0.85
25°C
0.95
0.90
0.87
70°C
1.00
0.95
0.91
85°C
1.02
0.96
0.93
100°C
1.05
0.99
0.96
Revision 2
3 -9
Go Upload

* Only PDF files are allowed for upload

* Enter up to 200 characters.