U1AFS600-1PQG208
Model | U1AFS600-1PQG208 |
Description | Field Programmable Gate Array, |
PDF file | Total 334 pages (File size: 18M) |
Chip Manufacturer | MICROSEMI |
Device Architecture
DINA and DINB
These are the input data signals, and they are nine bits wide. Not all nine bits are valid in all
configurations. When a data width less than nine is specified, unused high-order signals must be
grounded (Table
DOUTA and DOUTB
These are the nine-bit output data signals. Not all nine bits are valid in all configurations. As with DINA
and DINB, high-order bits may not be used (Table
The output data on unused pins is undefined.
Table 2-29 •
Unused/Used Input and Output Data Pins for Various Supported Bus Widths
DINx/DOUTx
D×W
4k×1
2k×2
1k×4
512×9
Unused
[8:1]
[8:2]
[8:4]
None
Used
[0]
[1:0]
[3:0]
[8:0]
Note:
The "x" in DINx and DOUTx implies A or B.
2- 62
R e visio n 2