U1AFS600-1PQG208
| Model | U1AFS600-1PQG208 |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Device Architecture
Table 2-169 •
AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
1.075
Input High (V)
1.325
Measuring Point* (V)
Cross point
VREF (typ.) (V)
–
Note:
*Measuring point = Vtrip. See
for a complete table of trip points.
Timing Characteristics
Table 2-170 •
LVDS
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V
Applicable to Pro I/Os
Speed Grade
Std.
–1
–2
t
DOUT
0.66
0.56
0.49
t
DP
2.10
1.79
1.57
t
DIN
0.04
0.04
0.03
t
PY
1.82
1.55
1.36
Units
ns
ns
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
BLVDS/M-LVDS
Bus LVDS (BLVDS) and Multipoint LVDS (M-LVDS) specifications extend the existing LVDS standard to
high-performance multipoint bus applications. Multidrop and multipoint bus configurations can contain
any combination of drivers, receivers, and transceivers. Microsemi LVDS drivers provide the higher drive
current required by BLVDS and M-LVDS to accommodate the loading. The driver requires series
terminations for better signal quality and to control voltage swing. Termination is also required at both
ends of the bus, since the driver can be located anywhere on the bus. These configurations can be
implemented using TRIBUF_LVDS and BIBUF_LVDS macros along with appropriate terminations.
Multipoint designs using Microsemi LVDS macros can achieve up to 200 MHz with a maximum of 20
loads. A sample application is given in
The input and output buffer delays are available in
the LVDS section in
Example: For a bus consisting of 20 equidistant loads, the following terminations provide the required
differential voltage, in worst-case industrial operating conditions at the farthest receiver: R
S
= 60
Ω
and
R
T
= 70
Ω,
given Z
0
= 50
Ω
(2") and Z
stub
= 50
Ω
(~1.5").
Receiver
EN
Transceiver
EN
Driver
Receiver
EN
EN
Transceiver
EN
R
+
-
T
+
D
+
-
-
R
+
-
T
+
BIBUF_LVDS
-
R
S
Z
stub
Z
0
R
T
Z
0
R
S
Z
stub
Z
stub
Z
0
Z
0
R
S
R
S
Z
stub
Z
stub
Z
0
Z
0
R
S
R
S
Z
stub
Z
stub
Z
0
Z
0
R
S
R
S
Z
stub
...
Z
0
Z
0
R
S
R
S
Z
0
Z
0
R
T
Figure 2-133 •
BLVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
2- 21 2
R e visio n 2
