T1022NXE7MQA
| Model | T1022NXE7MQA |
| Description | 32-BIT, 1200MHz, RISC PROCESSOR, PBGA780 |
| PDF file | Total 197 pages (File size: 1M) |
| Chip Manufacturer | PHILIPS |
Electrical characteristics
Table 67. TDM/SI DC electrical characteristics (DVDD=2.5V)
3
(continued)
Parameter
Output high voltage (DV
DD
= min, I
OH
= -1 mA)
Output low voltage (DV
DD
= min, I
OH
= 1 mA)
Symbol
V
OH
V
OL
2.0
-
Min
-
0.4
Max
V
V
Unit
-
-
Notes
1. The min V
IL
and max V
IH
values are based on the respective min and max DV
IN
values found in
2. The symbol V
IN
, in this case, represents the input voltage of the supply. It is referenced in
3. For recommended operating conditions, see
3.12.2.2
TDM/SI AC timing specifications
Table 68. TDM/SI AC timing specifications
1
Parameter
Symbol
1
t
SEKHOV
t
SEKHOX
t
SEIVKH
t
SEIXKH
2
2
5
2
Min
11
10
-
-
Max
ns
ns
ns
ns
Unit
This table provides the TDM/SI input and output AC timing specifications.
TDM/SI outputs-External clock delay
TDM/SI outputs-External clock High Impedance
TDM/SI inputs-External clock input setup time
TDM/SI inputs-External clock input hold time
Notes:
1. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
are measured at the pin.
2. For recommended operating conditions, see
NOTE
The rise/fall time on QUICC Engine block input pins should
not exceed 5 ns. This should be enforced especially on clock
signals. Rise time refers to signal transitions from 10% to 90%
of DV
DD
; fall time refers to transitions from 90% to 10% of
DV
DD
This figure provides the AC test load for the TDM/SI.
Z0 = 50
Ʊ
Output
DV
DD /2
Figure 31. TDM/SI AC test load
QorIQ T1042, T1022 Data Sheet, Rev. 2, 06/2015
Freescale Semiconductor, Inc.
103
Ʊ
RL = 50
