T1022NXE7MQA
Model | T1022NXE7MQA |
Description | 32-BIT, 1200MHz, RISC PROCESSOR, PBGA780 |
PDF file | Total 197 pages (File size: 1M) |
Chip Manufacturer | PHILIPS |
Electrical characteristics
Table 92. JTAG AC timing specifications
4
Parameter
Symbol
1
Min
Max
Unit
Notes
3. All outputs are measured from the midpoint voltage of the falling edge of t
TCLK
to the midpoint of the signal in question. The
output timings are measured at the pins. All output timings assume a purely resistive 50-Ω load. Time-of-flight delays must be
added for trace lengths, vias, and connectors in the system.
4. For recommended operating conditions, see
This figure provides the AC test load for TDO and the boundary-scan outputs of the
device.
Output
Z
0
= 50 Ω
R
L
= 50 Ω
OV
DD
/2
Figure 52. AC test load for the JTAG interface
This figure provides the JTAG clock input timing diagram.
VM
JTAG external clock
VM
VM
t
JTGR
t
JTGF
t
JTKHKL
t
JTG
VM = Midpoint voltage (OV
DD
/2)
Figure 53. JTAG clock input timing diagram
This figure provides the TRST_B timing diagram.
QorIQ T1042, T1022 Data Sheet, Rev. 2, 06/2015
126
Freescale Semiconductor, Inc.