T1022NXE7MQA
Model | T1022NXE7MQA |
Description | 32-BIT, 1200MHz, RISC PROCESSOR, PBGA780 |
PDF file | Total 197 pages (File size: 1M) |
Chip Manufacturer | PHILIPS |
Electrical characteristics
T CLK
SDHC_CLK
T
NDKHOV
SDHC_DAT/
SDHC_DATn_DIR
output
T
NDKHOX
T
NIKHOV
SDHC_CMD/
SD_CMD_DIR
output
T
NIKHOX
Figure 50. eSDHC DDR50/DDR mode output AC timing diagram
This table provides the eSDHC AC timing specifications for SDR104/eMMC HS200
mode as defined in
(EV
DD
/CV
DD
= 1.8V).
Table 85. eSDHC AC timing (SDR104/eMMC HS200)
Parameter
SDHC_CLK clock frequency
SDHC_CLK duty cycle
SDHC_CLK clock rise and fall times
Output hold time: SDHC_CLK to
SDHC_CMD, SDHC DATx valid,
SDHC_CMD_DIR,
SDHC_DATx_DIR
SD/SDIO SDR104 mode
eMMC HS200 mode
SD/SDIO SDR104 mode
eMMC HS200 mode
—
t
SCKR
/
t
SCKF
t
NIKHOX
1.58
1.6
—
ns
—
47
—
Symbol
f
SCK
—
Min
Max
165
175
53
1
%
ns
—
1
Units
MHz
Notes
—
Output delay time: SDHC_CLK to SD/SDIO SDR104
SDHC_CMD, SDHC DATx valid,
eMMC HS200 mode
SDHC_CMD_DIR,
SDHC_DATx_DIR
Input data window (UI)
Notes:
1. C
L
= C
BUS
+ C
HOST
+ C
CARD
≤ 10 pF.
2. For recommended operating conditions, see
SD/SDIO SDR104 mode
eMMC HS200 mode
t
NIKHOV
—
4.15
3.9
ns
—
t
IDV
0.5
0.475
—
Unit
interval
—
QorIQ T1042, T1022 Data Sheet, Rev. 2, 06/2015
Freescale Semiconductor, Inc.
121