T1022NXE7MQA
| Model | T1022NXE7MQA |
| Description | 32-BIT, 1200MHz, RISC PROCESSOR, PBGA780 |
| PDF file | Total 197 pages (File size: 1M) |
| Chip Manufacturer | PHILIPS |
Electrical characteristics
Table 3. Recommended operating conditions
Characteristic
Symbol
Recommended Value
Unit
Status
in Deep
Sleep
7
Notes
7. The Power supplies designated as OFF in this column should be switched OFF during Deep Sleep and those designated
as ON should not be switched OFF. There are few power supplies which can be optionally switched OFF, for more details
refer T1040 QorIQ Integrated Multicore Communications Processor Reference Manual.
Warning
When the device is in Deep Sleep mode, all external voltage
supplies applied to any I/O pins, with the exception of wake-up
pins, must be turned off. Applying external voltage to any I/O
pins, except the wake up pins, while the device is in Deep Sleep
mode may cause permanent damage to the device.
This figure shows the undershoot and overshoot voltages at the interfaces of the chip.
Nominal D/S/G/L/OVDD + 20%
D/S/G/L/OVDD + 5%
VIH
D/S/G/L/OVDD
GND
GND - 0.3 V
VIL
Note:
GND - 0.6 V
for SerDes
receiver inputs
GND - 0.7 V
Notes:
tCLOCK refers to the clock period associated with the respective interface:
For I2C OVDD, tCLOCK references SYSCLK.
For DDR GVDD, tCLOCK references Dn_MCLK.
For eSPI OVDD, tCLOCK references SPI_CLK.
For JTAG OVDD, tCLOCK references TCK.
For SerDes SVDD, tCLOCK references SD_REF_CLK.
For Ethernet LVDD, tCLOCK references ECn_GTX_CLK125.
Not to exceed 10%
of tCLOCK1
Figure 8. Overshoot/Undershoot voltage for G1V
DD
/L1V
DD
/OV
DD
/SV
DD
/DV
DD
/CV
DD
/
LV
DD
/EV
DD
QorIQ T1042, T1022 Data Sheet, Rev. 2, 06/2015
Freescale Semiconductor, Inc.
51
