T1022NXE7MQA
| Model | T1022NXE7MQA |
| Description | 32-BIT, 1200MHz, RISC PROCESSOR, PBGA780 |
| PDF file | Total 197 pages (File size: 1M) |
| Chip Manufacturer | PHILIPS |
Freescale Semiconductor
Data Sheet: Technical Data
Document Number T1042
Rev. 2, 06/2015
QorIQ T1042, T1022 Data
Sheet
Features
• e5500 cores built on Power Architecture® technology,
– T1042 has four cores and T1022 has two cores
– Each core with a private 256KB L2 cache
• 256 KB shared L3 CoreNet platform cache (CPC)
• Hierarchical interconnect fabric
– CoreNet Coherency manager supporting coherent
and non-coherent transactions with prioritization and
bandwidth allocation amongst CoreNet end-points
– 150Gbps coherent read bandwidth
• One 32-/64-bit DDR3L/DDR4 SDRAM memory
controllers
– ECC and interleaving support
• Data Path Acceleration Architecture (DPAA)
incorporating acceleration for the following functions:
– Packet parsing, classification, and distribution
– Queue management for scheduling, packet
sequencing, and congestion management
– Hardware buffer management for buffer allocation
and de-allocation
– Cryptography Acceleration
– RegEx Pattern Matching Acceleration
– IEEE Std 1588™ support
• Parallel Ethernet interfaces
– Up to two RGMII interface
– One MII interface
• Eight SerDes lanes for high-speed peripheral interfaces
– Four PCI Express 2.0 controllers
– Two Serial ATA (SATA 3Gb/s) controllers
– Up to five SGMII interface supporting 1000 Mbps
– Up to two SGMII interface with maximum speed of
2500 Mbps
– Supports 1000Base-KX
T1042
• Additional peripheral interfaces
– Two high-speed USB 2.0 controllers with integrated
PHY
– Enhanced secure digital host controller with support
for high capacity memory card(SD/eSDHC/eMMC)
– Enhanced Serial peripheral interface (eSPI)
– Four I2C controllers
– Two DUARTs
– Integrated flash controller supporting NAND and
NOR flash
– Display interface unit (DIU) with 12-bit dual data
rate
– TDM Interface
– Four GPIO controllers supporting up to 109 general
purpose I/O signals
– Two 8-channel DMA engines
– Multicore programmable interrupt controller (MPIC)
• QUICC Engine block
– 32-bit RISC controller for flexible support of the
communications peripherals
– Serial DMA channel for receive and transmit on all
serial channels
– Two universal communication controllers,
supporting TDM, HDLC and UART
• 780 FC-PBGA package, 23 mm x 23 mm
© 2015 Freescale Semiconductor, Inc.
