U1AFS250-2FG256YI
| Model | U1AFS250-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Device Architecture
Table 2-49 •
Analog Channel Specifications (continued)
Commercial Temperature Range Conditions, T
J
= 85°C (unless noted otherwise),
Typical: VCC33A = 3.3 V, VCC = 1.5 V
Parameter
VIND
2,3
VHYSDIN
VIHDIN
VILDIN
VMPWDIN
F
DIN
ISTBDIN
IDYNDIN
t
INDIN
VG
IG
Description
Input Voltage
Hysteresis
Input High
Input Low
Minimum Pulse With
Maximum Frequency
Input Leakage Current
Dynamic Current
Input Delay
Voltage Range
Output Current Drive
Refer to
High Current Mode
6
at 1.0 V
Low Current Mode: ±1 µA
Low Current Mode: ±3 µA
Low Current Mode: ± 10 µA
Low Current Mode: ± 30 µA
IOFFG
F
G
Maximum Off Current
Maximum switching rate High Current Mode
6
at 1.0 V, 1
kΩ resistive load
Low Current Mode:
±1 µA, 3 MΩ resistive load
Low Current Mode:
±3 µA, 1 MΩ resistive load
Low Current Mode:
±10 µA, 300 kΩ resistive load
Low Current Mode:
±30 µA, 105 kΩ resistive load
Notes:
1. VRSM is the maximum voltage drop across the current sense resistor.
2. Analog inputs used as digital inputs can tolerate the same voltage limits as the corresponding analog pad. There is no
reliability concern on digital inputs as long as VIND does not exceed these limits.
3. VIND is limited to VCC33A + 0.2 to allow reaching 10 MHz input frequency.
4. An averaging of 1,024 samples (LPF setting in Analog System Builder) is required and the maximum capacitance
allowed across the AT pins is 500 pF.
5. The temperature offset is a fixed positive value.
6. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
voltage on the pad.
7. When using SmartGen Analog System Builder, CalibIP is required to obtain 0 offset. For further details on CalibIP, refer
to the "Temperature, Voltage, and Current Calibration in Fusion FPGAs" chapter of the
Fusion FPGA Fabric User’s
Guide.
Condition
Refer to
Min.
Typ.
Max.
Units
Digital Input using Analog Pads AV, AC and AT
0.3
1.2
0.9
50
10
2
20
10
V
V
V
ns
MHz
µA
µA
ns
Gate Driver Output Using Analog Pad AG
±20
0.8
2.0
7.4
21.0
1.0
2.7
9.0
27.0
1.3
3
7
25
78
1.3
3.3
11.5
32.0
100
mA
µA
µA
µA
µA
nA
MHz
KHz
KHz
KHz
KHz
2- 12 2
R e visio n 3
