U1AFS250-2FG256YI
| Model | U1AFS250-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Device Architecture
Table 2-36 •
Analog Block Pin Description (continued)
Signal Name
GDON0 to GDON9
TMSTB0 to TMSTB9
DAVOUT0, DACOUT0, DATOUT0
to
DAVOUT9, DACOUT9, DATOUT9
DENAV0, DENAC0, DENAT0 to
DENAV9, DENAC9, DENAT9
AV0
AC0
AG0
AT0
ATRETURN01
AV1
AC1
AG1
AT1
AV2
AC2
AG2
AT2
ATRETURN23
AV3
AC3
AG3
AT3
AV4
AC4
AG4
AT4
ATRETURN45
AV5
AC5
AG5
AT5
AV6
AC6
Number
of Bits
10
10
30
Direction
Input
Input
Output
Function
Control to power MOS – 1 per quad
Location of
Details
Analog Quad
Temperature monitor strobe – 1 per Analog Quad
quad; active high
Digital outputs – 3 per quad
Analog Quad
30
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input
Input
Input
Output
Input
Input
Input
Input
Output
Input
Input
Input
Output
Input
Input
Input
Input
Output
Input
Input
Input
Output
Input
Input
Input
Input
Output
Input
Input
Input
Digital input enables – 3 per quad
Analog Quad 0
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Temperature monitor return shared by Analog Quad
Analog Quads 0 and 1
Analog Quad 1
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad 2
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Temperature monitor return shared by Analog Quad
Analog Quads 2 and 3
Analog Quad 3
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad 4
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Temperature monitor return shared by Analog Quad
Analog Quads 4 and 5
Analog Quad 5
Analog Quad
Analog Quad
Analog Quad
Analog Quad
Analog Quad 6
Analog Quad
Analog Quad
2- 82
R e visio n 3
