U1AFS250-2FG256YI
| Model | U1AFS250-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
t
CYC
WCLK
t
WCKFF
FF
t
CKAF
AFF
WA/RA
(Address Counter) NO MATCH
NO MATCH
Dist = AFF_TH
MATCH (FULL)
Figure 2-61 •
FIFO FULL and AFULL Flag Assertion
WCLK
WA/RA MATCH
(Address Counter) (EMPTY)
1st rising
edge
after 1st
write
NO MATCH
NO MATCH
2nd rising
edge
after 1st
write
t
RCKEF
NO MATCH
NO MATCH
Dist = AEF_TH + 1
RCLK
EF
t
CKAF
AEF
Figure 2-62 •
FIFO EMPTY Flag and AEMPTY Flag Deassertion
RCLK
WA/RA
(Address Counter) MATCH (FULL)
NO MATCH
NO MATCH
1st Rising
Edge
After 2nd
Read
t
WCKF
NO MATCH
NO MATCH
Dist = AFF_TH – 1
1st Rising
Edge
After 1st
Read
WCLK
FF
t
CKAF
AFF
Figure 2-63 •
FIFO FULL Flag and AFULL Flag Deassertion
Revision 3
2- 77
