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U1AFS250-2FG256YI

U1AFS250-2FG256YI

Model U1AFS250-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
Table 2-132 •
1.5 V LVCMOS Low Slew
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 1.4 V
Applicable to Standard I/Os
Drive
Strength
2 mA
Speed
Grade
Std.
–1
–2
t
DOUT
0.66
0.56
0.49
t
DP
12.33
10.49
9.21
t
DIN
0.04
0.04
0.03
t
PY
1.42
1.21
1.06
t
EOUT
0.43
0.36
0.32
t
ZL
11.79
10.03
8.81
t
ZH
12.33
10.49
9.21
t
LZ
2.45
2.08
1.83
t
HZ
2.32
1.98
1.73
Units
ns
ns
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
Table 2-133 •
1.5 V LVCMOS High Slew
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 1.4 V
Applicable to Standard I/Os
Drive
Strength
2 mA
Speed
Grade
Std.
–1
–2
t
DOUT
0.66
0.56
0.49
t
DP
7.65
6.50
5.71
t
DIN
0.04
0.04
0.03
t
PY
1.42
1.21
1.06
t
EOUT
0.43
0.36
0.32
t
ZL
6.31
5.37
4.71
t
ZH
7.65
6.50
5.71
t
LZ
2.45
2.08
1.83
t
HZ
2.45
2.08
1.83
Units
ns
ns
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
Revision 3
2- 199
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