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U1AFS250-2FG256YI

U1AFS250-2FG256YI

Model U1AFS250-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Datasheet Information
Revision
Advance v1.1
(May 2008)
Changes
The following text was incorrect and therefore deleted:
VCC33A
Analog Power Filter
Analog power pin for the analog power supply low-pass filter. An external 100 pF
capacitor should be connected between this pin and ground.
There is still a description of V
CC33A
on
page 2-224.
Page
2-204
Advance v1.0
(January 2008)
All Timing Characteristics tables were updated. For the Differential I/O Standards,
the Standard I/O support tables are new.
Table 2-3 • Array Coordinates
was updated to change the max x and y values
Table 2-12 • Fusion CCC/PLL Specification
was updated.
A note was added to
Table 2-16 · RTC ACM Memory Map.
A reference to the Peripheral’s User’s Guide was added to the
"Voltage Regulator
Power Supply Monitor (VRPSM)" section.
In
Table 2-25 • Flash Memory Block Timing,
the commercial conditions were
updated.
In
Table 2-26 • FlashROM Access Time,
the commercial conditions were missing
and have been added below the title of the table.
In
Table 2-36 • Analog Block Pin Description,
the function description was updated
for the ADCRESET.
In the
"Voltage Monitor" section,
the following sentence originally had ± 10% and it
was changed to +10%.
The Analog Quad inputs are tolerant up to 12 V + 10%.
In addition, this statement was deleted from the datasheet:
Each I/O will draw power when connected to power (3 mA at 3 V).
The
"Terminology" section
is new.
The
"Current Monitor" section
was significantly updated.
Figure 2-72 • Timing
Diagram for Current Monitor Strobe
to
Figure 2-74 • Negative Current Monitor
and
Table 2-37 • Recommended Resistor for Different Current Range Measurement
are
new.
The
"ADC Description" section
was updated to add the
"Terminology" section.
In the
"Gate Driver" section,
25 mA was changed to 20 mA and 1.5 MHz was
changed to 1.3 MHz. In addition, the following sentence was deleted:
The maximum AG pad switching frequency is 1.25 MHz.
The
"Temperature Monitor" section
was updated to rewrite most of the text and add
Figure 2-78, Figure 2-79,
and
Table 2-38 • Temperature Data Format.
In
Table 2-38 • Temperature Data Format,
the temperature K column was changed
for 85°C from 538 to 358.
In
Table 2-45 • ADC Interface Timing,
"Typical-Case" was changed to "Worst-Case."
The
"ADC Interface Timing" section
is new.
Table 2-46 • Analog Channel Specifications
was updated.
The
"V
CC15A
Analog Power Supply (1.5 V)" section
was updated.
The
"V
CCPLA/B
PLL Supply Voltage" section
is new.
In
"V
CCNVM
Flash Memory Block Power Supply (1.5 V)" section,
supply was
changed to supply input.
N/A
2-9
2-31
2-37
2-42
2-55
2-58
2-82
2-86
2-88
2-90
2-93
2-94
2-96
2-98
2-110
2-110
2-118
2-224
2-225
2-224
5-8
R e vi s i o n 3
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