U1AFS250-2FG256YI
| Model | U1AFS250-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
Table 2-68 •
I/O Bank Support by Device
I/O Bank
Standard I/O
Advanced I/O
Pro I/O
Analog Quad
AFS090
N
E, W
–
S
AFS250
N
E, W
–
S
AFS600
–
E, W
N
S
AFS1500
–
E, W
N
S
Note:
E = East side of the device
W = West side of the device
N = North side of the device
S = South side of the device
Table 2-69 •
Fusion VCCI Voltages and Compatible Standards
VCCI (typical)
3.3 V
2.5 V
1.8 V
1.5 V
Compatible Standards
LVTTL/LVCMOS 3.3, PCI 3.3, SSTL3 (Class I and II),* GTL+ 3.3, GTL 3.3,* LVPECL
LVCMOS 2.5, LVCMOS 2.5/5.0, SSTL2 (Class I and II),* GTL+ 2.5,* GTL 2.5,* LVDS, BLVDS, M-
LVDS
LVCMOS 1.8
LVCMOS 1.5, HSTL (Class I),* HSTL (Class II)*
Note:
*I/O standard supported by Pro I/O banks.
Table 2-70 •
Fusion VREF Voltages and Compatible Standards*
VREF (typical)
1.5 V
1.25 V
1.0 V
0.8 V
0.75 V
SSTL3 (Class I and II)
SSTL2 (Class I and II)
GTL+ 2.5, GTL+ 3.3
GTL 2.5, GTL 3.3
HSTL (Class I), HSTL (Class II)
Compatible Standards
Note:
*I/O standards supported by Pro I/O banks.
Revision 3
2- 137
