U1AFS250-2FG256YI
Model | U1AFS250-2FG256YI |
Description | Field Programmable Gate Array, |
PDF file | Total 334 pages (File size: 18M) |
Chip Manufacturer | MICROSEMI |
Device Architecture
t
PD
A
NAND2 or
Any Combinatorial
Logic
Y
B
t
PD
= MAX(t
PD(RR)
, t
PD(RF)
, t
PD(FF)
, t
PD(FR)
)
where edges are applicable for the
particular combinatorial cell
VCCA
50%
A, B, C
50%
GND
VCCA
50%
50%
OUT
GND
VCCA
OUT
50%
t
PD
(RF)
Figure 2-4 •
t
PD
(RR)
t
PD
(FF)
t
PD
(FR)
GND
50%
Combinatorial Timing Model and Waveforms
2-4
R e vi s i o n 3