U1AFS250-2FGG256YI
| Model | U1AFS250-2FGG256YI |
| Description | FPGA |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Device Architecture
Table 2-77 •
Comparison Table for 5 V–Compliant Receiver Scheme
Schem
e
1
2
3
4
Board Components
Two resistors
Resistor and Zener 3.3 V
Bus switch
Minimum resistor value
2
R = 47
Ω
at T
J
= 70°C
R = 150
Ω
at T
J
= 85°C
R = 420
Ω
at T
J
= 100°C
Speed
Low to high
1
Medium
High
Medium
Current Limitations
Limited by transmitter's drive strength
Limited by transmitter's drive strength
N/A
Maximum diode current at 100% duty cycle, signal constantly
at '1'
52.7 mA at T
J
=70°C / 10-year lifetime
16.5 mA at T
J
= 85°C / 10-year lifetime
5.9 mA at T
J
= 100°C / 10-year lifetime
For duty cycles other than 100%, the currents can be
increased by a factor = 1 / (duty cycle).
Example: 20% duty cycle at 70°C
Maximum current = (1 / 0.2) * 52.7 mA = 5 * 52.7 mA = 263.5
mA
Notes:
1. Speed and current consumption increase as the board resistance values decrease.
2. Resistor values ensure I/O diode long-term reliability.
2- 15 0
R e visio n 3
