• Inventory
  • Products
  • Technical Information
  • Circuit Diagram
  • Data Sheet
Data Sheet
Home > Data Sheet > U1AFS250-2FGG256YI
U1AFS250-2FGG256YI

U1AFS250-2FGG256YI

Model U1AFS250-2FGG256YI
Description FPGA
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
At the system level, the skew circuit can be used in applications where transmission activities on
bidirectional data lines need to be coordinated. This circuit, when selected, provides a timing margin that
can prevent bus contention and subsequent data loss or transmitter overstress due to transmitter-to-
transmitter current shorts.
presents an example of the skew circuit implementation in a
bidirectional communication system.
shows how bus contention is created, and
shows how it can be avoided with the skew circuit.
Transmitter 1: Fusion I/O
Skew or
Bypass
Skew
Routing
Delay (t1)
EN(b1)
Transmitter
ENABLE/
DISABLE
Transmitter 2: Generic I/O
EN(b2)
Routing
Delay (t2)
EN(r1)
ENABLE(t2)
ENABLE(t1)
Bidirectional Data Bus
Figure 2-110 •
Example of Implementation of Skew Circuits in Bidirectional Transmission Systems Using
Fusion Devices
EN (b1)
EN (b2)
ENABLE (r1)
ENABLE (t1)
Transmitter 1: OFF
ENABLE (t2)
Transmitter 2: ON
Transmitter 1: ON
Transmitter 1: OFF
Transmitter 2: OFF
Bus
Contention
Figure 2-111 •
Timing Diagram (bypasses skew circuit)
Revision 3
2- 153
Go Upload

* Only PDF files are allowed for upload

* Enter up to 200 characters.