U1AFS600-2FG256YI
| Model | U1AFS600-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
along with the use of the active bipolar prescaler, current monitor, or temperature monitor, the minimum
sample time(s) for each must be obeyed.
can be used to determine the appropriate value of STC.
You can calculate the minimum actual acquisition time by using
VOUT = VIN(1 – e–
t/RC
)
EQ 16
For 0.5 LSB gain error, VOUT should be replaced with (VIN –(0.5 × LSB Value)):
(VIN – 0.5 × LSB Value) = VIN(1 – e–
t/RC
)
EQ 17
where VIN is the ADC reference voltage (VREF)
Solving
t = RC x ln (VIN / (0.5 x LSB Value))
EQ 18
where R = Z
INAD
+ R
SOURCE
and C = C
INAD
.
Calculate the value of STC by using
t
SAMPLE
= (2 + STC) x (1 / ADCCLK) or t
SAMPLE
= (2 + STC) x (ADC Clock Period)
EQ 19
where ADCCLK = ADC clock frequency in MHz.
t
SAMPLE
= 0.449 µs from bit resolution in
ADC Clock frequency = 10 MHz or a 100 ns period.
STC = (t
SAMPLE
/ (1 / 10 MHz)) – 2 = 4.49 – 2 = 2.49.
You must round up to 3 to accommodate the minimum sample time.
Table 2-44 •
Acquisition Time Example with VAREF = 2.56 V
VIN = 2.56V, R = 4K (R
SOURCE
~ 0), C = 18 pF
Resolution
8
10
12
LSB Value (mV)
10
2.5
0.625
Min. Sample/Hold Time for 0.5 LSB (µs)
0.449
0.549
0.649
Table 2-45 •
Acquisition Time Example with VAREF = 3.3 V
VIN = 3.3V, R = 4K (R
SOURCE
~ 0), C = 18 pF
Resolution
8
10
12
LSB Value (mV)
12.891
3.223
0.806
Min. Sample/Hold time for 0.5 LSB (µs)
0.449
0.549
0.649
Sample Phase
A conversion is performed in three phases. In the first phase, the analog input voltage is sampled on the
input capacitor. This phase is called sample phase. During the sample phase, the output signals BUSY
and SAMPLE change from '0' to '1', indicating the ADC is busy and sampling the analog signal. The
sample time can be controlled by input signals STC[7:0]. The sample time can be calculated by
When controlling the sample time for the ADC along with the use of Prescaler or Current Monitor or
Temperature Monitor, the minimum sample time for each must be obeyed. Refer to
and the
t
sample
=
(
2
+
STC
) ×
t
ADCCLK
EQ 20
STC: Sample Time Control value (0–255)
t
SAMPLE
is the sample time
Revision 3
2- 111
