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U1AFS600-2FG256YI

U1AFS600-2FG256YI

Model U1AFS600-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
Table 2-117 •
2.5 V LVCMOS High Slew
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 2.3 V
Applicable to Standard I/Os
Drive
Strength
2 mA
Speed
Grade
Std.
–1
–2
4 mA
Std.
–1
–2
6 mA
Std.
–1
–2
8 mA
Std.
–1
–2
t
DOUT
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
t
DP
8.20
6.98
6.13
8.20
6.98
6.13
4.77
4.05
3.56
4.77
4.05
3.56
t
DIN
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
t
PY
1.29
1.10
0.96
1.29
1.10
0.96
1.29
1.10
0.96
1.29
1.10
0.96
t
EOUT
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
t
ZL
7.24
6.16
5.41
7.24
6.16
5.41
4.55
3.87
3.40
4.55
3.87
3.40
t
ZH
8.20
6.98
6.13
8.20
6.98
6.13
4.77
4.05
3.56
4.77
4.05
3.56
t
LZ
2.03
1.73
1.52
2.03
1.73
1.52
2.38
2.03
1.78
2.38
2.03
1.78
t
HZ
1.91
1.62
1.43
1.91
1.62
1.43
2.55
2.17
1.91
2.55
2.17
1.91
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
Revision 3
2- 189
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