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Home > Data Sheet > U1AFS600-2FG256YI
U1AFS600-2FG256YI

U1AFS600-2FG256YI

Model U1AFS600-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Device Architecture
Table 2-105 •
3.3 V LVTTL / 3.3 V LVCMOS High Slew
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 3.0 V
Applicable to Pro I/Os
Drive
Speed
Strength Grade t
DOUT
4 mA
Std.
–1
–2
8 mA
Std.
–1
–2
12 mA
Std.
–1
–2
16 mA
Std.
–1
–2
24 mA
Std.
–1
–2
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
t
EOU
t
DP
7.88
6.71
5.89
5.08
4.32
3.79
3.67
3.12
2.74
3.46
2.95
2.59
3.21
2.73
2.39
t
DIN
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
t
PY
1.20
1.02
0.90
1.20
1.02
0.90
1.20
1.02
0.90
1.20
1.02
0.90
1.20
1.02
0.90
t
PYS
1.57
1.33
1.17
1.57
1.33
1.17
1.57
1.33
1.17
1.57
1.33
1.17
1.57
1.33
1.17
T
t
ZL
8.03
6.83
6.00
5.17
4.40
3.86
3.74
3.18
2.79
3.53
3.00
2.63
3.27
2.78
2.44
t
ZH
6.70
5.70
5.01
4.14
3.52
3.09
2.87
2.44
2.14
2.61
2.22
1.95
2.16
1.83
1.61
t
LZ
2.69
2.29
2.01
3.05
2.59
2.28
3.28
2.79
2.45
3.33
2.83
2.49
3.39
2.88
2.53
t
HZ
2.59
2.20
1.93
3.21
2.73
2.40
3.61
3.07
2.70
3.72
3.17
2.78
4.13
3.51
3.08
t
ZLS
10.26
8.73
7.67
7.41
6.30
5.53
5.97
5.08
4.46
5.76
4.90
4.30
5.50
4.68
4.11
t
ZHS
8.94
7.60
6.67
6.38
5.43
4.76
5.11
4.34
3.81
4.84
4.12
3.62
4.39
3.74
3.28
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
2- 18 0
R e visio n 3
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