U1AFS600-2FG256YI
| Model | U1AFS600-2FG256YI |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Device Architecture
Electrostatic Discharge (ESD) Protection
Fusion devices are tested per JEDEC Standard JESD22-A114-B.
Fusion devices contain clamp diodes at every I/O, global, and power pad. Clamp diodes protect all
device pads against damage from ESD as well as from excessive voltage transients.
Each I/O has two clamp diodes. One diode has its positive (P) side connected to the pad and its negative
(N) side connected to VCCI. The second diode has its P side connected to GND and its N side
connected to the pad. During operation, these diodes are normally biased in the Off state, except when
transient voltage is significantly above VCCI or below GND levels.
By selecting the appropriate I/O configuration, the diode is turned on or off. Refer to
and
for more information about I/O standards and the clamp diode.
The second diode is always connected to the pad, regardless of the I/O configuration selected.
Table 2-75 •
Fusion Standard and Advanced I/O – Hot-Swap and 5 V Input Tolerance Capabilities
Clamp Diode
I/O Assignment
3.3 V LVTTL/LVCMOS
3.3 V PCI, 3.3 V PCI-X
LVCMOS 2.5 V
LVCMOS 2.5 V / 5.0 V
LVCMOS 1.8 V
LVCMOS 1.5 V
Differential,
LVDS/BLVDS/M-
LVDS/ LVPECL
3
Notes:
1. Can be implemented with an external IDT bus switch, resistor divider, or Zener with resistor.
2. Can be implemented with an external resistor and an internal clamp diode.
3. Bidirectional LVPECL buffers are not supported. I/Os can be configured as either input buffers or output buffers.
Hot Insertion
5 V Input Tolerance
1
Input
Buffer
Output
Buffer
Standard Advanced Standard Advanced Standard Advanced
I/O
I/O
I/O
I/O
I/O
I/O
No
N/A
No
N/A
No
No
N/A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
N/A
Yes
N/A
Yes
Yes
N/A
No
No
No
No
No
No
No
Yes
1
N/A
No
N/A
No
No
N/A
Yes
1
Yes
1
No
Yes
2
No
No
No
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Table 2-76 •
Fusion Pro I/O – Hot-Swap and 5 V Input Tolerance Capabilities
I/O Assignment
3.3 V LVTTL/LVCMOS
3.3 V PCI, 3.3 V PCI-X
LVCMOS 2.5 V
3
LVCMOS 2.5 V / 5.0 V
3
LVCMOS 1.8 V
LVCMOS 1.5 V
Voltage-Referenced Input Buffer
Differential, LVDS/BLVDS/M-LVDS/LVPECL
4
Notes:
1. Can be implemented with an external IDT bus switch, resistor divider, or Zener with resistor.
2. Can be implemented with an external resistor and an internal clamp diode.
3. In the
select the
LVCMOS5 macro for the LVCMOS 2.5 V / 5.0 V I/O standard or the LVCMOS25 macro for the LVCMOS 2.5 V I/O
standard.
4. Bidirectional LVPECL buffers are not supported. I/Os can be configured as either input buffers or output buffers.
Clamp
Diode
No
Yes
No
Yes
No
No
No
No
Hot
Insertion
Yes
No
Yes
No
Yes
Yes
Yes
Yes
5 V Input
Tolerance
Yes
1
Yes
1
No
Yes
2
No
No
No
No
Input Buffer
Output Buffer
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
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