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U1AFS600-2FG256YI

U1AFS600-2FG256YI

Model U1AFS600-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
Table 2-122 •
1.8 V LVCMOS Low Slew
Commercial Temperature Range Conditions: T
J
= 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 1.7 V
Applicable to Advanced I/Os
Drive
Strength
2 mA
Speed
Grade
Std.
–1
–2
2
4 mA
Std.
–1
–2
8 mA
Std.
–1
–2
12 mA
Std.
–1
–2
16 mA
Std.
–1
–2
t
DOUT
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
0.66
0.56
0.49
t
DP
15.53
13.21
11.60
10.48
8.91
7.82
8.05
6.85
6.01
7.50
6.38
5.60
7.29
6.20
5.45
t
DIN
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
t
PY
1.31
1.11
0.98
1.31
1.11
0.98
1.31
1.11
0.98
1.31
1.11
0.98
1.31
1.11
0.98
t
EOUT
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
t
ZL
14.11
12.01
10.54
10.41
8.86
7.77
8.20
6.97
6.12
7.64
6.50
5.71
7.23
6.15
5.40
t
ZH
15.53
13.21
11.60
10.48
8.91
7.82
7.84
6.67
5.86
7.30
6.21
5.45
7.29
6.20
5.45
t
LZ
2.78
2.36
2.07
3.23
2.75
2.41
3.54
3.01
2.64
3.61
3.07
2.69
3.71
3.15
2.77
t
HZ
1.60
1.36
1.19
2.73
2.33
2.04
3.27
2.78
2.44
3.41
2.90
2.55
3.95
3.36
2.95
t
ZLS
16.35
13.91
12.21
12.65
10.76
9.44
10.43
8.88
7.79
9.88
8.40
7.38
9.47
8.06
7.07
t
ZHS
17.77
15.11
13.27
12.71
10.81
9.49
10.08
8.57
7.53
9.53
8.11
7.12
9.53
8.11
7.12
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note:
For the derating values at specific junction temperature and voltage supply levels, refer to
Revision 3
2- 193
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