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U1AFS600-2FG256YI

U1AFS600-2FG256YI

Model U1AFS600-2FG256YI
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
Flash Memory Block Addressing
shows a graphical representation of the flash memory block.
Spare Page
Page 31
s
ge
Pa
33
Page 3
Page 2
Page 1
Page 0
..
..
rn
c to
Se
r1
c to
Se
r0
c to
Se
1190
140
....
Block
0
1
2
3
4
5
6
7
Aux
Block
Block Organization
User Data
(32 bits)
Byte 14
Figure 2-34 •
Flash Memory Block Organization
Each FB is partitioned into sectors, pages, blocks, and bytes. There are 64 sectors in an FB, and each
sector contains 32 pages and 1 spare page. Each page contains 8 data blocks and 1 auxiliary block.
Each data block contains 16 bytes of user data, and the auxiliary block contains 4 bytes of user data.
Addressing for the FB is shown in
Table 2-20 •
FB Address Bit Allocation ADDR[17:0]
17
Sector
12
11
Page
7
6
Block
4
3
Byte
0
When the spare page of a sector is addressed (SPAREPAGE active), ADDR[11:7] are ignored.
When the Auxiliary block is addressed (AUXBLOCK active), ADDR[6:2] are ignored.
Note: The spare page of sector 0 is unavailable for any user data. Writes to this page will return an error,
and reads will return all zeroes.
Byte 15
Byte 0
Byte 1
Byte 2
Byte 3
Notes:
1 block = 128 bits
1 page = 8 blocks plus the AUX block
1 sector = 33 pages
1 Flash array = 64 sectors
Revision 3
....
2- 45
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