U1AFS600-2FG484
| Model | U1AFS600-2FG484 |
| Description | Field Programmable Gate Array, |
| PDF file | Total 334 pages (File size: 18M) |
| Chip Manufacturer | MICROSEMI |
Fusion Family of Mixed Signal FPGAs
Analog System Characteristics
Table 2-49 •
Analog Channel Specifications
Commercial Temperature Range Conditions, T
J
= 85°C (unless noted otherwise),
Typical: VCC33A = 3.3 V, VCC = 1.5 V
Parameter
Description
Input Voltage
(Prescaler)
VINAP
Uncalibrated Gain and
Offset Errors
Calibrated Gain and
Offset Errors
Bandwidth1
Input Resistance
Scaling Factor
Sample Time
Current Monitor Using Analog Pads AV and AC
VRSM
1
Maximum Differential
Input Voltage
Resolution
Common Mode Range
CMRR
Common Mode
Rejection Ratio
DC – 1 KHz
1 KHz - 10 KHz
> 10 KHz
t
CMSHI
Strobe High time
ADC
conv.
time
5
0.02
Input differential voltage > 50 mV
–2 –(0.05 x
VRSM) to +2 +
(0.05 x VRSM)
60
50
30
200
Refer to
– 10.5 to +12
V
dB
dB
dB
µs
VAREF / 10
mV
Refer to
Prescaler modes (Table
10
µs
Condition
Refer to
Refer to
Refer to
100
KHz
Min.
Typ.
Max.
Units
Voltage Monitor Using Analog Pads AV, AC and AT (using prescaler)
t
CMSHI
t
CMSHI
Strobe Low time
Settling time
Accuracy
µs
µs
mV
Notes:
1. VRSM is the maximum voltage drop across the current sense resistor.
2. Analog inputs used as digital inputs can tolerate the same voltage limits as the corresponding analog pad. There is no
reliability concern on digital inputs as long as VIND does not exceed these limits.
3. VIND is limited to VCC33A + 0.2 to allow reaching 10 MHz input frequency.
4. An averaging of 1,024 samples (LPF setting in Analog System Builder) is required and the maximum capacitance
allowed across the AT pins is 500 pF.
5. The temperature offset is a fixed positive value.
6. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
voltage on the pad.
7. When using SmartGen Analog System Builder, CalibIP is required to obtain 0 offset. For further details on CalibIP, refer
to the "Temperature, Voltage, and Current Calibration in Fusion FPGAs" chapter of the
Revision 2
2- 119
Related PDFs
| Model | Description | Manufacturer | Operation |
|---|---|---|---|
 U1AFS600-2FG484YC
|
FPGA | MICROSEMI | Preview |
