• Inventory
  • Products
  • Technical Information
  • Circuit Diagram
  • Data Sheet
Data Sheet
Home > Data Sheet > U1AFS600-2FG484
U1AFS600-2FG484

U1AFS600-2FG484

Model U1AFS600-2FG484
Description Field Programmable Gate Array,
PDF file Total 334 pages (File size: 18M)
Chip Manufacturer MICROSEMI
Fusion Family of Mixed Signal FPGAs
Table 2-98 •
I/O Short Currents IOSH/IOSL (continued)
Drive Strength
2.5 V LVCMOS
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
1.8 V LVCMOS
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
1.5 V LVCMOS
2 mA
4 mA
6 mA
8 mA
12 mA
3.3 V PCI/PCI-X
Applicable to Standard I/O Banks
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
4 mA
6 mA
8 mA
2.5 V LVCMOS
2 mA
4 mA
6 mA
8 mA
1.8 V LVCMOS
1.5 V LVCMOS
Note:
*T
J
= 100°C
The length of time an I/O can withstand IOSH/IOSL events depends on the junction temperature. The
reliability data below is based on a 3.3 V, 36 mA I/O setting, which is the worst case for this type of
analysis.
For example, at 100°C, the short current condition would have to be sustained for more than six months
to cause a reliability concern. The I/O design does not contain any short circuit protection, but such
protection would only be needed in extremely prolonged stress conditions.
2 mA
4 mA
2 mA
25
25
51
51
16
16
32
32
9
17
13
27
27
54
54
18
18
37
37
11
22
16
Per PCI/PCI-X
specification
IOSH (mA)*
16
16
32
32
65
83
169
9
17
35
45
91
91
13
25
32
66
66
103
IOSL (mA)*
18
18
37
37
74
87
124
11
22
44
51
74
74
16
33
39
55
55
109
Revision 2
2- 175
Go Upload

* Only PDF files are allowed for upload

* Enter up to 200 characters.