MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
Table 24-44. PPSH Field Descriptions
Field
7–0
PPSH[7:0]
Description
Polarity Select Port H
0 Falling edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-up device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
1 Rising edge on the associated port H pin sets the associated flag bit in the PIFH register.
A pull-down device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
24.0.5.48 Port H Interrupt Enable Register (PIEH)
7
6
5
4
3
2
1
0
R
PIEH7
W
Reset
0
0
0
0
0
0
0
0
PIEH6
PIEH5
PIEH4
PIEH3
PIEH2
PIEH1
PIEH0
Figure 24-50. Port H Interrupt Enable Register (PIEH)
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated
with Port H.
Table 24-45. PIEH Field Descriptions
Field
7–0
PIEH[7:0]
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
Description
24.0.5.49 Port H Interrupt Flag Register (PIFH)
7
6
5
4
3
2
1
0
R
PIFH7
W
Reset
0
0
0
0
0
0
0
0
PIFH6
PIFH5
PIFH4
PIFH3
PIFH2
PIFH1
PIFH0
Figure 24-51. Port H Interrupt Flag Register (PIFH)
Read: Anytime.
Write: Anytime.
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling
edge based on the state of the PPSH register. To clear this flag, write logic level “1” to the
corresponding bit in the PIFH register. Writing a “0” has no effect.
