MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 21 External Bus Interface (S12XEBIV2)
21.4.2.2.2
Write Access Timing
Table 21-12. Write Access (1 Cycle)
Access #0
Bus cycle ->
ECLK phase
ADDR[22:20] / ACC[2:0]
ADDR[15:0] / IVD[15:0]
DATA[15:0] (write)
R/W
...
...
...
addr 0
?
0
0
...
...
...
high
Access #1
2
high
addr 1
low
acc 1
iqstat 0
x
data 0
1
1
data 1
Access #2
3
high
addr 2
low
acc 2
iqstat 1
x
data 2
1
1
...
...
...
...
...
...
...
1
low
acc 0
iqstat -1
?
ADDR[19:16] / IQSTAT[3:0] ...
Table 21-13. Write Access (2 Cycles)
Access #0
Bus cycle ->
ECLK phase
ADDR[22:20] / ACC[2:0]
ADDR[15:0] / IVD[15:0]
DATA[15:0] (write)
R/W
...
...
...
addr 0
?
0
0
0
...
...
...
high
Access #1
2
3
low
000
iqstat 0
x
data 0
0
1
high
addr 1
low
acc 1
0000
x
x
1
...
...
...
...
...
...
...
1
low
acc 0
iqstat-1
?
addr 0
high
ADDR[19:16] / IQSTAT[3:0] ...
Table 21-14. Write Access (n–1 Cycles)
Access #0
Bus cycle ->
ECLK phase
ADDR[22:20] / ACC[2:0]
ADDR[15:0] / IVD[15:0]
DATA[15:0] (write)
R/W
...
...
...
addr 0
?
0
0
0
0
...
...
...
high
Access #1
3
...
low
000
addr 0
0000
x
data 0
0
0
...
1
...
...
...
...
addr 1
high
1
low
acc 0
iqstat-1
?
addr 0
high
2
low
000
iqstat 0
x
high
n
low
acc 1
0000
x
x
1
...
...
...
...
...
...
...
ADDR[19:16] / IQSTAT[3:0] ...
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
797