MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
Table 23-70
lists the pin functions in relationship with the different operating modes. If two entries per pin
are displayed, a ‘mux’ indicates time-multiplexing between the two functions and an ‘or’ means that a
configuration bit exists which can be altered after reset to select the respective function (displayed in
italics). Refer to S12X_EBI section for details.
Table 23-70. Expanded Bus Pin Functions versus Operating Modes
Single-Chip Modes
Pin
Normal Single-
Chip
GPIO
Special Single-
Chip
GPIO
Normal
Expanded
GPIO
or
EWAIT
ADDR[22:20]
or
GPIO
ADDR[19:16]
or
GPIO
ADDR[15:8]
or
GPIO
ADDR[7:1]
or
GPIO
UDS
or
GPIO
DATA[15:8]
or
GPIO
DATA[7:0]
GPIO
or
ECLKX2
GPIO
RE
ECLK
or
GPIO
LDS
or
GPIO
WE
GPIO
or
CS2
GPIO
or
CS0
(1)
Expanded Modes
Emulation
Single-Chip
GPIO
Emulation
Expanded
GPIO
or
EWAIT
ADDR[22:20]
mux
ACC[2:0]
ADDR[19:16]
mux
IQSTAT[3:0]
ADDR[15:8]
mux
IVD[15:8]
ADDR[7:1]
mux
IVD[7:1]
ADDR0
mux
IVD0
DATA[15:8]
Special
Test
GPIO
PK7
PK[6:4]
GPIO
GPIO
ADDR[22:20]
mux
ACC[2:0]
ADDR[19:16]
mux
IQSTAT[3:0]
ADDR[15:8]
mux
IVD[15:8]
ADDR[7:1]
mux
IVD[7:1]
ADDR0
mux
IVD0
DATA[15:8]
ADDR[22:20]
PK[3:0]
GPIO
GPIO
ADDR[19:16]
PA[7:0]
GPIO
GPIO
ADDR[15:8]
PB[7:1]
GPIO
GPIO
ADDR[7:1]
PB0
GPIO
GPIO
ADDR0
PC[7:0]
GPIO
GPIO
DATA[15:8]
or
GPIO
DATA[7:0]
GPIO
or
ECLKX2
GPIO
GPIO
ECLK
or
GPIO
LSTRB
PD[7:0]
PE7
GPIO
GPIO
or
ECLKX2
GPIO
GPIO
GPIO
or
ECLK
GPIO
GPIO
GPIO
or
ECLKX2
GPIO
GPIO
ECLK
or
GPIO
GPIO
DATA[7:0]
ECLKX2
DATA[7:0]
ECLKX2
PE6
PE5
PE4
TAGHI
TAGLO
ECLK
TAGHI
TAGLO
ECLK
PE3
LSTRB
LSTRB
PE2
PJ5
GPIO
GPIO
GPIO
GPIO
R/W
GPIO
R/W
GPIO
or
CS2
GPIO
or
CS0
(1)
R/W
GPIO
or
CS2
GPIO
or
CS0
PJ4
GPIO
GPIO
GPIO
MC9S12XDP512 Data Sheet, Rev. 2.21
970
Freescale Semiconductor
