MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
7
6
5
4
3
2
1
0
R
W
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented
Figure 10-16. MSCAN Reserved Register
Read: Always read 0x0000 in normal system operation modes
Write: Unimplemented in normal system operation modes
NOTE
Writing to this register when in special modes can alter the MSCAN
functionality.
10.3.2.14 MSCAN Miscellaneous Register (CANMISC)
This register provides additional features.
7
6
5
4
3
2
1
0
R
W
Reset:
0
0
0
0
0
0
0
BOHOLD
0
0
0
0
0
0
0
0
= Unimplemented
Figure 10-17. MSCAN Miscellaneous Register (CANMISC)
Read: Anytime
Write: Anytime; write of ‘1’ clears flag; write of ‘0’ ignored
Table 10-19. CANMISC Register Field Descriptions
Field
0
BOHOLD
Description
Bus-off State Hold Until User Request
— If BORM is set in
Section 10.3.2.2, “MSCAN Control Register 1
(CANCTL1),
this bit indicates whether the module has entered the bus-off state. Clearing this bit requests the
recovery from bus-off. Refer to
Section 10.5.2, “Bus-Off Recovery,”
1 Module is bus-off and holds this state until user request
10.3.2.15 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
439