MC9S12XDP512CFU
| Model | MC9S12XDP512CFU |
| Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
| PDF file | Total 1348 pages (File size: 8M) |
| Chip Manufacturer | PHILIPS |
Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
24.0.5.65 Port AD1 Pull Up Enable Register 1 (PER1AD1)
7
6
5
4
3
2
1
0
R
PER1AD17
W
Reset
0
0
0
0
0
0
0
0
PER1AD16
PER1AD15
PER1AD14
PER1AD13
PER1AD12
PER1AD11
PER1AD10
Figure 24-67. Port AD1 Pull Up Enable Register 1 (PER1AD1)
Read: Anytime.
Write: Anytime.
This register activates a pull-up device on the respective PAD[7:0] pin if the port is used as input. This bit
has no effect if the port is used as output. Out of reset no pull-up device is enabled.
Table 24-59. PER1AD1 Field Descriptions
Field
7–0
PER1AD1[7:0]
Pull Device Enable Port AD1 Register 1
0 Pull-up device is disabled.
1 Pull-up device is enabled.
Description
Functional Description
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output from the external bus interface module or a peripheral module or an input to the external bus
interface module or a peripheral module.
A set of configuration registers is common to all ports with exceptions in the expanded bus interface and
ATD ports (Table
24-60).
All registers can be written at any time; however a specific configuration might
not become active.
Example: Selecting a pull-up device
This device does not become active while the port is used as a push-pull output.
Table 24-60. Register Availability per Port
1
Port
A
B
E
K
T
S
M
P
H
Data
yes
yes
yes
yes
yes
yes
yes
yes
yes
Data
Direction
yes
yes
yes
yes
yes
yes
yes
yes
yes
Input
—
—
—
—
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
Reduced
Drive
yes
Pull
Enable
yes
Polarity
Select
—
—
—
—
—
yes
yes
yes
yes
Wired-OR
Mode
—
—
—
—
—
yes
yes
—
—
Interrupt
Enable
—
—
—
—
—
—
—
yes
yes
Interrupt
Flag
—
—
—
—
—
—
—
yes
yes
MC9S12XDP512 Data Sheet, Rev. 2.21
1028
Freescale Semiconductor
