MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 15 Background Debug Module (S12XBDMV2)
15.3.2
Register Descriptions
A summary of the registers associated with the BDM is shown in
Figure 15-2.
Registers are accessed by
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Global
Address
0x7FFF00
Register
Name
Reserved
R
W
Bit 7
X
6
X
5
X
4
X
3
X
2
X
1
0
Bit 0
0
0x7FFF01
BDMSTS
R
W
ENBDM
X
BDMACT
0
SDV
TRACE
CLKSW
X
UNSEC
0
0x7FFF02
Reserved
R
W
X
X
X
X
X
X
0x7FFF03
Reserved
R
W
X
X
X
X
X
X
X
X
0x7FFF04
Reserved
R
W
X
X
X
X
X
X
X
X
0x7FFF05
Reserved
R
W
X
X
X
X
X
X
X
X
0x7FFF06
BDMCCRL R
W
CCR7
0
CCR6
0
CCR5
0
CCR4
0
CCR3
0
CCR2
CCR1
CCR0
0x7FFF07
BDMCCRH R
W
CCR10
CCR9
CCR8
0x7FFF08
BDMGPR
R
W
BGAE
0
BGP6
0
BGP5
0
BGP4
0
BGP3
0
BGP2
0
BGP1
0
BGP0
0
0x7FFF09
Reserved
R
W
0x7FFF0A
Reserved
R
W
0
0
0
0
0
0
0
0
0x7FFF0B
Reserved
R
W
0
0
0
0
0
0
0
0
= Unimplemented, Reserved
X
= Indeterminate
0
= Implemented (do not alter)
= Always read zero
Figure 15-2. BDM Register Summary
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
573