MC9S12XDP512CFU
Model | MC9S12XDP512CFU |
Description | 16-BIT, FLASH, 40MHz, MICROCONTROLLER, PQFP80 |
PDF file | Total 1348 pages (File size: 8M) |
Chip Manufacturer | PHILIPS |
Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)
Read: Anytime
Write: Anytime
NOTE
Write these bits only when the corresponding channel is disabled.
Table 8-7. PWMCAE Field Descriptions
Field
7–0
CAE[7:0]
Description
Center Aligned Output Modes on Channels 7–0
0 Channels 7–0 operate in left aligned output mode.
1 Channels 7–0 operate in center aligned output mode.
8.3.2.6
PWM Control Register (PWMCTL)
The PWMCTL register provides for various control of the PWM module.
7
6
5
4
3
2
1
0
R
W
Reset
CON67
0
CON45
0
CON23
0
CON01
0
PSWAI
0
PFRZ
0
0
0
0
0
= Unimplemented or Reserved
Figure 8-8. PWM Control Register (PWMCTL)
Read: Anytime
Write: Anytime
There are three control bits for concatenation, each of which is used to concatenate a pair of PWM
channels into one 16-bit channel. When channels 6 and 7are concatenated, channel 6 registers become the
high order bytes of the double byte channel. When channels 4 and 5 are concatenated, channel 4 registers
become the high order bytes of the double byte channel. When channels 2 and 3 are concatenated, channel
2 registers become the high order bytes of the double byte channel. When channels 0 and 1 are
concatenated, channel 0 registers become the high order bytes of the double byte channel.
See
Section 8.4.2.7, “PWM 16-Bit Functions”
for a more detailed description of the concatenation PWM
Function.
NOTE
Change these bits only when both corresponding channels are disabled.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
373